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Logic kỹ thuật số thử nghiệm và mô phỏng P1

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Depending on the complex- ity of the product, the test may be a mere perusal of the product to determine whether it suits one’s personal whims, or it could be a long, exhaustive checkout of a complex system to ensure compliance with many performance and safety criteria.. The focus will be on technical issues, but it is important not to...

Logic kỹ thuật số thử nghiệm và mô phỏng P2

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The prototype is a physical mockup of the circuit being designed. In Figure 2.1(e), the tri-state element has the enabling input En . y L } constitute the present state of the machine, while the values { Y 1 , Y 2. Figure 2.2 Huffman model.. of the values on the inputs and the present state. the distinction often depends...

Logic kỹ thuật số thử nghiệm và mô phỏng P3

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An important part of the test is the creation of effective stimuli. Develop test programs that exercise the functionality of the design.. Furthermore, that does not solve the problem of diagnosing the cause of the malfunction.. The effectiveness of a test program can be measured by determining how many of the commonly occurring faults are detected by the set of...

Logic kỹ thuật số thử nghiệm và mô phỏng P4

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The goal is to find a test for an SA0 on input 3 of gate K (i.e., the input driven by gate H . Second, the values assigned to the primary inputs must make the fault effect visible at the output. We attempt to create a sensitized path from the fault origin to the output. a 1 on the output...

Logic kỹ thuật số thử nghiệm và mô phỏng P5

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Test Vector Ordering The effects of memory can be seen from analysis of the cross-coupled NAND latch [cf. Four faults will be considered, these being the input SA1 faults on each of the two NAND gates (numbering is from top to bottom in the diagram). We get the following response for the fault-free circuit (FF) and the circuit corresponding to...

Logic kỹ thuật số thử nghiệm và mô phỏng P6

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With time, however, and the increasing complexity of the ICs and PCBs being tested, it became prohibitively expensive to design and build these testers. more thorough investigation of the many tester architectures and strategies that have been devised to test digital devices during design debug and manufacturing test.. A static tester , such as the one depicted in Figure 6.1,...

Logic kỹ thuật số thử nghiệm và mô phỏng P7

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After examining the design and test environment, we will take an in-depth look at fault modeling because, in the final analysis, the fault model that is chosen will have a significant effect on the quality of the test. Of the 26,415 die that were analyzed, 4349 were determined to be faulty. The Venn diagram in Figure 7.1 shows the distribution...

Logic kỹ thuật số thử nghiệm và mô phỏng P8

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That, how- ever, is not consistent with existing state of the art. The purpose of the rules is to reduce the complexity of the test problem. Controllability is a measure of the ease or difficulty with which a net can be driven to a known logic state. This practice impedes the ability of the in-circuit tester to control the device....

Logic kỹ thuật số thử nghiệm và mô phỏng P9

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Some of these methods can trace their origins back to the very beginnings of the digital logic era. One of the problems associated with the testing of ICs is the interface between the tester and the IC. 1 One of the design practices that supports field test is the use of flip-flops at the boundaries of the IC. a n...

Logic kỹ thuật số thử nghiệm và mô phỏng P10

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10.1 INTRODUCTION. For example, in the PowerPC MPC750, memory accounts for 85% of the transistors but only 44% of the die area. 10.2 SEMICONDUCTOR MEMORY ORGANIZATION. Figure 10.2 Dynamic memory cell.. Figure 10.3 Semiconductor memory properties.. One of the more significant changes is the division of the memory array into several smaller arrays. Figure 10.4 A semiconductor memory organization.. 10.3...

Logic kỹ thuật số thử nghiệm và mô phỏng P11

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11.1 INTRODUCTION. However, when the IC is defective, due to the presence of leakage in the cir- cuit, or possibly even to an open, current flow usually becomes excessive. Worse still, an IC may fail shortly after the product is delivered to the customer. 11.2 BACKGROUND. 2 His two-transistor inverter consumed just a few nanowatts of standby power, whereas equivalent...

Logic kỹ thuật số thử nghiệm và mô phỏng P12

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A manufacturing test based on scan targets defects more directly in the structure of the circuit. A Verilog or VHDL model can be compiled into C or C++ code which is then compiled to the native language of the host computer. Traditionally, point accelerators have been used to speed up various facets of the design task, such as simulation. One...